Field of the Invention: The present invention relates to non-volatile semiconductor memories. More specifically, the present invention relates to compensating for temperature variations that may occur during operation of the semiconductor memories.
Description of Related Art: Non-volatile semiconductor memories are becoming increasingly popular in a wide range of electronic applications from computer systems to personal appliances such as cellular phones, personal digital assistants, cameras, and music players. With the increased popularity, comes increased need for placing larger volumes of data on an individual device and operating the devices with lower power consumption.
Non-volatile memory cells, such as Electrically Erasable Programmable Memories (EEPROMs) and Flash EEPROMS, store information in a field effect transistor (FET) using a floating gate disposed between the substrate and a control gate. FIG. 1 illustrates a flash cell comprising a conventional transistor used in Flash memories. The flash cell 10 includes a drain 12, a source 14, the floating gate 16, and the control gate 18. The floating gate 16 is isolated from the control gate 18 and substrate by dielectric layers formed above and below the floating gate. In flash memories, the control gates of a plurality of flash cells are coupled to a word-line. Thus, the signal on the control gate is referred to herein as Vwl, or variations thereof.
Assuming the flash cell is initially erased, the flash cell is programmed by placing charge on the floating gate. Once the charge is stored on the floating gate, it is effectively trapped on the floating gate and remains there even when power is removed. Subsequently, an erase process may be used to remove the stored charge from the floating gate. Programming and erasing are accomplished using a variety of mechanisms well known in the art, such as, avalanche injection, channel injection, and tunneling depending on the structure of the flash cells.
FIG. 2 illustrates current characteristics of a flash cell as a current versus voltage curve. In operation, an erased flash cell exhibits current characteristics as shown by curve 20, which is defined as a binary “1.” When the flash cell is programmed, the additional charge on the floating gate moves the current curve for the flash cell to a higher voltage. The more charge stored on the floating gate, the farther to the right the current curve will move. Curve 30 illustrates the current characteristics of a flash cell safely programmed as a binary “0.” Curve 25 illustrates the current characteristics of a flash cell that is at a minimum acceptable programming to be considered a “0.” Line 40 indicates a current threshold (Ith) at which a sense amplifier distinguishes between a programmed and an unprogrammed flash cell. If a current from the flash cell (Icell) is below Ith, the flash cell will be considered unprogrammed, if Icell is above Ith, the flash cell will be considered programmed. In other words, there is a threshold voltage (Vth), represented by line 50, at which the flash cell conducts a high enough current for the sense amplifier to detect. Thus, after programming, a flash cell may be read by applying a voltage that is midway between an unprogrammed voltage and a programmed voltage. With this voltage applied, if a current is sensed, the flash cell is considered unprogrammed (i.e., “1” in this case). If a current is not sensed, the flash cell is considered programmed (i.e., “0” in this case).
FIG. 3 illustrates the margin that may be present in a flash cell that is programmed relative to a voltage used on the word-line during a read process. Curve 25 illustrates the current characteristics of a flash cell that is at a minimum acceptable programming to be considered programmed. After a flash cell is programmed, a verify process may be done. In the verify process, the flash cell is read using a verify word-line voltage (Vwl_v) that is at the highest voltage acceptable to read out a programmed flash cell to give a current Icell below the threshold current Ith. If a flash cell is not detected as programmed after this verify process, the cell may be programmed again, or it may be marked as a bad cell and replaced with a spare cell. In other words, Vwl_v indicates the highest voltage possible on the word-line to read a cell as unprogrammed. Thus, when the flash cell is read during a normal read operation word-line voltage (Vwl_r) less than Vwl_v is used to ensure that there is margin for distinguishing between a programmed and an unprogrammed flash cell. This margin is illustrated as a “verify margin.”
However, the current characteristics of a flash cell may change with changes in temperature. This temperature change may reduce the margin available for distinguishing between a programmed and unprogrammed flash cell. There is a need for a new way to generate a word-line voltage to increase margin by modifying the word-line voltage depending on temperature and the properties of a flash cell.